On-Chip Interconnect with aelite

Composable and Predictable Systems

  • Andreas Hansson
  • Kees Goossens

Part of the Embedded Systems book series (EMSY)

Table of contents

  1. Front Matter
    Pages i-ix
  2. Andreas Hansson, Kees Goossens
    Pages 1-18
  3. Andreas Hansson, Kees Goossens
    Pages 19-39
  4. Andreas Hansson, Kees Goossens
    Pages 41-68
  5. Andreas Hansson, Kees Goossens
    Pages 69-102
  6. Andreas Hansson, Kees Goossens
    Pages 103-120
  7. Andreas Hansson, Kees Goossens
    Pages 121-141
  8. Andreas Hansson, Kees Goossens
    Pages 143-155
  9. Andreas Hansson, Kees Goossens
    Pages 157-169
  10. Andreas Hansson, Kees Goossens
    Pages 171-180
  11. Andreas Hansson, Kees Goossens
    Pages 181-184
  12. Back Matter
    Pages 185-208

About this book


On-Chip Interconnect with aelite: Composable and Predictable Systems by: (Authors) Andreas Hansson Kees Goossens Embedded systems are comprised of components integrated on a single circuit, a System on Chip (SoC). One of the critical elements of such an SoC, and the focus of this work, is the on-chip interconnect that enables different components to communicate with each other. The book provides a comprehensive description and implementation methodology for the Philips/NXP Aethereal/aelite Network-on-Chip (NoC). The presentation offers a systems perspective, starting from the system requirements and deriving and describing the resulting hardware architectures, embedded software, and accompanying design flow. Readers get an in depth view of the interconnect requirements, not centered only on performance and scalability, but also the multi-faceted, application-driven requirements, in particular composability and predictability. The book shows how these qualitative requirements are implemented in a state-of-the-art on-chip interconnect, and presents the realistic, quantitative costs. •Uses real-world illustrations extensively, in the form of case studies and examples that communicate the power of the methods presented; •Uses one consistent, running example throughout the book. This example is introduced in the introductory chapter and supports the presentation throughout the work, with additional details given in each chapter; •Content has both breadth (architecture, resource allocation, hardware/software instantiation, formal verification) and depth (block-level architecture description, allocation algorithms, complete run-time APIs, detailed formal models, complete case studies mapped to FPGAs); •Includes numerous case studies, e.g. a JPEG decoder, set-top box and digital radio design.


Embedded Systems Interconnect Network on Chip On-Chip Communication On-Chip Interconnect System on Chip

Authors and affiliations

  • Andreas Hansson
    • 1
  • Kees Goossens
    • 2
  1. 1.Research & DevelopmentARM Ltd.CambridgeUnited Kingdom
  2. 2.Potentiaal/PT 9.34, Faculty of Electrical EngineeringEindhoven University of TechnologyEindhovenNetherlands

Bibliographic information

  • DOI
  • Copyright Information Springer Science+Business Media, LLC 2011
  • Publisher Name Springer, New York, NY
  • eBook Packages Engineering Engineering (R0)
  • Print ISBN 978-1-4419-6496-0
  • Online ISBN 978-1-4419-6865-4
  • Series Print ISSN 2193-0155
  • Buy this book on publisher's site