System-on-Chip Methodologies & Design Languages

  • Peter J. Ashenden
  • Jean P. Mermet
  • Ralf Seepold

Table of contents

  1. Front Matter
    Pages i-x
  2. VHDL Trends

    1. Front Matter
      Pages 1-1
    2. Robert H. Klenke, James H. Aylor, Paul Menchini, Ron Waxman, William Anderson, Jack Stinson
      Pages 3-12
    3. Celia López, Teresa Riesgo, Yago Torroja, Javier Uceda, Luis Entrena
      Pages 13-24
    4. A. Windisch, D. Monjau, T. Schneider, J. Mades, M. Glesner, W. Ecker
      Pages 37-46
    5. Tom J. Kazmierski, Fazrena A. Hamid
      Pages 47-56
  3. Formal Verification

    1. Front Matter
      Pages 57-57
    2. Dominique Borrione, Philippe Georgelin, Vanderlei Moraes Rodrigues
      Pages 59-69
    3. Scott Switzer, David Landoll, Thomas Anderson
      Pages 71-80
    4. Yiping Fan, Jinsong Bei, Jinian Bian, Hongxi Xue, Xianlong Hong, Jun Gu
      Pages 97-107
  4. Synthesis

    1. Front Matter
      Pages 109-109
    2. Hen-Ming Lin, Jing-Yang Jou
      Pages 111-122
    3. Wolfram Putzke-Röming, Wolfgang Nebel
      Pages 123-134
  5. Specification Formalisms

    1. Front Matter
      Pages 147-147
    2. Perry Alexander, David Barton
      Pages 149-159
    3. Peter J. Ashenden, Perry Alexander, David L. Barton
      Pages 161-170
    4. Wenbiao Wu, Ingo Sander, Axel Jantsch
      Pages 171-185
    5. Mark B. Josephs
      Pages 187-192
    6. Norbert Fristacky, Jozef Kacerik, Tibor Bartos
      Pages 193-204
    7. M. Antoniotti, A. Ferrari, A. Flesca, A. Sangiovanni-Vincentelli
      Pages 205-214
  6. Tool Performance

    1. Front Matter
      Pages 231-231
    2. Sathyanarayanan Seshadri, Sanjeev Thiyagarajan, John Willis, Gregory D. Peterson
      Pages 233-244
  7. Methods for SOC Design and Re-Use

    1. Front Matter
      Pages 283-283
    2. Wolfgang Nebel, Frank Oppenheimer, Guido Schumacher, Laïla Kabous, Martin Radetzki, Wolfram Putzke-Röming
      Pages 285-296
    3. Grant Martin, Bill Salefski
      Pages 297-306
    4. Natividad Martínez Madrid, Ralf Seepold
      Pages 307-316
    5. Brian Bailey, Gjalt de Jong, Patrick Schaumont, Chris Lennard
      Pages 317-331
    6. Frank Schirrmeister, Stan Krolikoski
      Pages 333-342

About this book


System-on-Chip Methodologies & Design Languages brings together a selection of the best papers from three international electronic design language conferences in 2000. The conferences are the Hardware Description Language Conference and Exhibition (HDLCon), held in the Silicon Valley area of USA; the Forum on Design Languages (FDL), held in Europe; and the Asia Pacific Chip Design Language (APChDL) Conference. The papers cover a range of topics, including design methods, specification and modeling languages, tool issues, formal verification, simulation and synthesis. The results presented in these papers will help researchers and practicing engineers keep abreast of developments in this rapidly evolving field.


C programming language Embedded System Processing Software formal verification modeling optimization selection system on chip (SoC)

Editors and affiliations

  • Peter J. Ashenden
    • 1
  • Jean P. Mermet
    • 2
  • Ralf Seepold
    • 3
  1. 1.Ashenden Designs Pty. Ltd.Australia
  2. 2.ECSIFrance
  3. 3.Universität KarlsruheGermany

Bibliographic information

  • DOI
  • Copyright Information Springer-Verlag US 2001
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4419-4901-1
  • Online ISBN 978-1-4757-3281-8
  • Buy this book on publisher's site