On Teaching Fast Adder Designs: Revisiting Ladner & Fischer

  • Guy Even
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3895)


We present a self-contained and detailed description of the parallel-prefix adder of Ladner and Fischer. Very little background is assumed in digital hardware design. The goal is to understand the rational behind the design of this adder and view the parallel-prefix adder as an outcome of a general method.


Clock Cycle Output Port Input Port Input Symbol Combinational Circuit 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Guy Even
    • 1
  1. 1.School of Electrical EngineeringTel-Aviv UniversityIsrael

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