Programmable Data Communication Blocks

  • Alex DoboliEmail author
  • Edward H. Currie


This chapter presents a design methodology for implementing performance-optimized communication subsystems for embedded applications. Serial communication modules based on the SPI and UART standards are detailed, and their implementation using PSoC’s programmable digital block is explained.


Channel Allocation Physical Address Global Clock Software Routine Hardware Circuit 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  1. 1.Department of Electrical EngineeringState University of New YorkStony BrookUSA
  2. 2.Department of Computer ScienceHofstra UniversityHempsteadUSA

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