Statistical MOS Model

  • Christopher Michael
  • Mohammed Ismail
Part of the The Kluwer International Series in Engineering and Computer Science book series (SECS, volume 211)


Advances in microelectronics fabrication coupled with the desire to create faster, more complex MOS circuits have pushed the feature size of many analog/digital VLSI processes to the 1–2 µm range. Because variances in parameters such as channel length, channel width, threshold voltage and substrate doping do not scale with dimension, relative device mismatch increases as the feature size is reduced. It is expected that performance variances, caused by this mismatch, in short-channel MOS circuits will be crucial and may, ultimately, introduce a limitation for device scaling in integrated circuits.


Parameter Correlation Parameter Mismatch Coordinate Method Circuit Layout Statistical Parameter Model 
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Copyright information

© Springer Science+Business Media New York 1993

Authors and Affiliations

  • Christopher Michael
    • 1
  • Mohammed Ismail
    • 2
  1. 1.National SemiconductorUSA
  2. 2.Ohio State UniversityUSA

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