Statistical CAD of Analog MOS Circuits
- 93 Downloads
The strength of circuit simulations based on the SMOS model developed in Chapter 3 is their ability to determine the variance of a given circuit performance without prior knowledge concerning the dependence of the circuit output on the individual device parameters. This dependence is preserved by the circuit simulator much the same way the effect of transistor bias on performance uncertainty is maintained. However, while statistical simulation is able to determine the effect of device variability on circuit performance, it yields little information concerning which device characteristic contributes to the performance variance. Through simple statistical analyses of basic analog circuit building blocks, useful information concerning the origin of circuit output variances can be deduced. In addition, these analyses can discern the relative importance of parameter variance and transistor bias on the circuit performance variance.
KeywordsCircuit Performance Current Mirror Differential Pair Circuit Yield Circuit Optimization
Unable to display preview. Download preview PDF.