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As device feature sizes in analog MOS circuits are reduced to the micron or sub-micron range, the effect of process variability on circuit performance and reliability is magnified. Statistical methods are required to simulate the effect of process variability to enable circuit designers to “design-in” quality through circuit robustness. In the preceding chapters, a framework for statistical modeling and simulation is introduced for analog MOS circuits. Of chief importance is the statistical parameter model, since the accuracy of statistical circuit simulations are linked to the effectiveness of the underlying model. Experimental process characterization, necessary to tune the statistical model to a given fabrication process, is also examined. Of course, the usefulness of a statistical model is tied to its ability to be incorporated in a circuit simulation program. Two such implementations of the statistical model are discussed in Chapter 4. Finally, the capabilities of the statistical simulations, based on the statistical model, are investigated through analysis and simulation of key analog circuit building blocks.
KeywordsAnalog Circuit Digital Circuit Current Mirror Test Chip Process Variability
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