Low Power Programmable Gain Analog to Digital Converter for Integrated Neural Implant Front End

  • Amir ZjajoEmail author
  • Carlo Galuzzi
  • Rene van Leuken
Conference paper
Part of the Communications in Computer and Information Science book series (CCIS, volume 574)


Integrated neural implants interface with the brain using biocompatible electrodes to provide high yield cell recordings, large channel counts and access to spike data and/or field potentials with high signal-to-noise ratio. By increasing the number of recording electrodes, spatially broad analysis can be performed that can provide insights on how and why neuronal ensembles synchronize their activity. However, the maximum number of channels is constrained by noise, area, bandwidth, power, thermal dissipation and the scalability and expandability of the recording system. In this chapter, we characterize the noise fluctuations on a circuit-architecture level for efficient hardware implementation of programmable gain analog to digital converter for neural signal-processing. This approach provides key insight required to address signal-to-noise ratio, response time, and linearity of the physical electronic interface. The proposed methodology is evaluated on a prototype converter designed in standard single poly, six metal 90-nm CMOS process.


Total Harmonic Distortion Noise Voltage Input Transistor Operational Transconductance Amplifier Saturation Voltage 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.



This research was supported in part by the European Union and the Dutch government as part of the CATRENE program under Heterogeneous INCEPTION project.


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Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  1. 1.Delft University of TechnologyDelftThe Netherlands

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