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High Resolution Microfabrication and Neural Networks

  • L. D. Jackel
  • R. E. Howard
  • H. P. Graf
  • J. Denker
  • B. Straughn
Conference paper
  • 169 Downloads
Part of the NATO ASI Series book series (volume 20)

Abstract

This paper reviews basic lithographic considerations for current integrated circuit fabrication at the 1 micron level and illustrates methods for making structures with dimensions smaller than 0.1 micron. Many of these methods are well suited to fabricating high-density, resistive neural-networks.

Keywords

Proximity Effect Projection Optic Micron Level Minimum Feature Size Wire Pair 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    For a perpective of the current status of lithography see the proceedings of the 1984 Int. Symposium on Electron, Ion, and Photon Beams, J. Vac. Sci. and Technol. B3, (Jan/Feb 1985).Google Scholar
  2. 2.
    J. J. Hopfield, Proc. Natl. Acad. Sci. USA 79, 2554 (1982).CrossRefMathSciNetGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1986

Authors and Affiliations

  • L. D. Jackel
    • 1
  • R. E. Howard
    • 1
  • H. P. Graf
    • 1
  • J. Denker
    • 1
  • B. Straughn
    • 1
  1. 1.AT&T Bell LaboratoriesHolmdelUSA

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