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Multi-Gate Tunneling FETs

  • Michael FuldeEmail author
Chapter
  • 950 Downloads
Part of the Springer Series in Advanced Microelectronics book series (MICROELECTR., volume 28)

Abstract

In Chap. 5 the integration of tunneling FETs in a low-power multi-gate technology is discussed as example for an alternative device concept and as outlook to analog design aspects beyond CMOS. Analog design considerations are derived from basic device performance, temperature and matching behavior. Although multi-gate tunneling FETs (MuGTFETs) feature low on-currents, promising analog properties and low variability regarding temperature and threshold voltage are demonstrated. Device simulations identify gate stack engineering and tuning of doping profiles as suitable measures for device optimization. A novel MuGTFET reference circuit is developed making use of the specific tunneling device characteristics. The circuit is robust against temperature and supply voltage variations and features low-power consumption.

Keywords

Tunneling Junction Drain Current Tunneling Current Power Supply Rejection Ratio Reference Circuit 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media B.V. 2010

Authors and Affiliations

  1. 1.Infineon Technologies Austria AGVillachAustria

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