Models for Bridging Defects

Test and Diagnosis
  • Michel RenovellEmail author
  • Florence Azais
  • Joan Figueras
  • Rosa Rodríguez-Montañés
  • Daniel Arumí
Part of the Frontiers in Electronic Testing book series (FRET, volume 43)


Bridging defects are responsible for a large percentage of failures in CMOS technologies and their impact in nanometer technologies with highly dense interconnect structures is expected to increase. In this chapter, a survey of the key developments in modeling bridging defects and their implications in test and diagnosis are presented. An overview of the historical developments of these models from the “wired AND/OR” and “voting” models to more realistic proposals taking into consideration the resistance values of the bridge are presented. The logic detectability of bridging defects considering the resistance of the bridge assuring its detectability is explored. The concept of Analogue Detectability Interval (ADI) as well as its applicability to increase the quality of the vectors detecting these defect classes is introduced. Quality of electronic circuits and systems requires the availability of effective diagnosis techniques. The basic concepts of logic as well as current-based (IDDQ) diagnostic strategies are included in this chapter.


VLSI Test Diagnosis Defect Short Bridging defect CMOS  Realistic model Analogue detectability interval 


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Copyright information

© Springer Science+Business Media B.V. 2010

Authors and Affiliations

  • Michel Renovell
    • 1
    Email author
  • Florence Azais
    • 1
  • Joan Figueras
    • 2
  • Rosa Rodríguez-Montañés
    • 2
  • Daniel Arumí
    • 2
  1. 1.LIRMM-CNRSMontpellierFrance
  2. 2.Electronic Engineering Dpt. ETSEIBUniversitat Politècnica de Catalunya (UPC)BarcelonaSpain

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