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Models for Power-Aware Testing

  • Patrick GirardEmail author
  • Hans-Joachim Wunderlich
Chapter
Part of the Frontiers in Electronic Testing book series (FRET, volume 43)

Abstract

Power consumption of circuits and systems receives more and more attention. In test mode, power consumption is even more critical than in system model and has severe impact on reliability, yield and test costs. This chapter describes the different types and sources of test power. Power-aware techniques for test pattern generation, design for test and test data compression are presented which allow efficient power constrained testing with minimized hardware cost and test application time.

Keywords

Low power test Design for test 

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Copyright information

© Springer Science+Business Media B.V. 2010

Authors and Affiliations

  1. 1.LIRMM/CNRSMontpellierFrance
  2. 2.Institut für Technische Informatik, Universität StuttgartStuttgartGermany

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